cpuid_amd64.s 949 B

123456789101112131415161718192021222324252627282930313233343536373839404142
  1. // Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file.
  2. //+build amd64,!gccgo
  3. // func asmCpuid(op uint32) (eax, ebx, ecx, edx uint32)
  4. TEXT ·asmCpuid(SB), 7, $0
  5. XORQ CX, CX
  6. MOVL op+0(FP), AX
  7. CPUID
  8. MOVL AX, eax+8(FP)
  9. MOVL BX, ebx+12(FP)
  10. MOVL CX, ecx+16(FP)
  11. MOVL DX, edx+20(FP)
  12. RET
  13. // func asmCpuidex(op, op2 uint32) (eax, ebx, ecx, edx uint32)
  14. TEXT ·asmCpuidex(SB), 7, $0
  15. MOVL op+0(FP), AX
  16. MOVL op2+4(FP), CX
  17. CPUID
  18. MOVL AX, eax+8(FP)
  19. MOVL BX, ebx+12(FP)
  20. MOVL CX, ecx+16(FP)
  21. MOVL DX, edx+20(FP)
  22. RET
  23. // func asmXgetbv(index uint32) (eax, edx uint32)
  24. TEXT ·asmXgetbv(SB), 7, $0
  25. MOVL index+0(FP), CX
  26. BYTE $0x0f; BYTE $0x01; BYTE $0xd0 // XGETBV
  27. MOVL AX, eax+8(FP)
  28. MOVL DX, edx+12(FP)
  29. RET
  30. // func asmRdtscpAsm() (eax, ebx, ecx, edx uint32)
  31. TEXT ·asmRdtscpAsm(SB), 7, $0
  32. BYTE $0x0F; BYTE $0x01; BYTE $0xF9 // RDTSCP
  33. MOVL AX, eax+0(FP)
  34. MOVL BX, ebx+4(FP)
  35. MOVL CX, ecx+8(FP)
  36. MOVL DX, edx+12(FP)
  37. RET